The computing industry faces increasing challenges in its efforts to improve the speed and efficiency of software-driven computing devices, e.g., due to power limitations and other factors. Software-driven computing devices employ one or more central processing units (CPUs) that process machine-readable instructions in a conventional temporal manner. To address this issue, the computing industry has proposed using hardware acceleration components (such as field-programmable gate arrays (FPGAs)) to supplement the processing performed by software-driven computing devices. However, software-driven computing devices and hardware acceleration components are dissimilar types of devices having fundamentally different architectures, performance characteristics, power requirements, program configuration paradigms, interface features, and so on. It is thus a challenging task to integrate these two types of devices together in a manner that satisfies the various design requirements of a particular data processing environment.